At last but not least, as it is highlighted in Figure 5, the maximum efficiency has been improved up to As per results shown in the full paper, a better overall behavior has been achieved as the inverter losses have decreased due to the lower equivalent capacitance of the full SiC-Diodes module, resulting in lower switching losses.
In other hand, the rectifier losses have decreased by means of the lower on-resistance of the SiC-Diodes, resulting in lower conduction losses. Have you enjoyed reading this article?
Then follow us on LinkedIn and stay up-to-date with daily posts about the latest developments on the industry, products and applications, tools and software as well as research and development. Rogers Germany GmbH. Littelfuse Europe GmbH. Schunk Sonosystems GmbH. Parasitic elements Parasitic effects in transformers include interwinding coupling capacitances for both the primary and secondary windings, a magnetizing inductance of the core, and leakage inductances for both the primary and secondary.
These transformer parasitic effects strongly influence the converter performance. Coupling capacitance causes common-mode EMC problems. Core saturation caused by magnetizing inductance limits the transformer current. Leakage inductances are especially troublesome, reducing efficiency and generating radiated EMI. Leakage inductances are also responsible for the voltage spikes that arise whenever the current changes rapidly in the windings.
Such overvoltages stress the primary switch and secondary diodes, so they must either be sized to withstand the peak voltage or fitted with a parallel snubber network to dissipate the energy in the spikes. However, the energy in the spikes and the power that the snubber has to absorb constitute an energy loss that diminishes the efficiency of the converter. The energy in the spikes and the power that the snubber must absorb can be calculated according to:.
A snubber cannot eliminate the power loss caused by the spikes. The power that would otherwise be dissipated in the switch or rectifier diode is now dissipated by snubber network resistors instead. Besides the spikes caused by the parasitic leakage inductance, any coupled reactive system will also exhibit resonant frequencies. Most transformer-based designs try to either reduce these parasitic elements to a minimum or choose operating frequencies where resonance is not an issue.
However, a quasi-resonant or resonant converter design deliberately encourages resonance by increasing the winding inductance or by adding additional inductors because controlling this resonance can facilitate an efficient converter design. As has been mentioned before, one big source of efficiency loss in any converter is the power dissipation in the output diodes. Low forward-voltage-drop Schottky diodes can sometimes serve as an alternative for low-power converters, but they are expensive when sized to cope with higher currents.
Even so, the forward drop is around mV, so the power loss can still be significant. A big leap forward in efficiency improvement has been the development of synchronous rectification. In a typical circuit with diode rectification, one diode acts as a rectifier and another is a freewheeling diode.
Both diodes are alternately loaded with approximately the same current. The losses from the forward voltage drop in the diodes is just the voltage drop times the diode current. With a typical forward voltage of 0. The new half cycle will then proceed as discussed above, with I S being the initial value of current mentioned in that discussion. As with the current-fed isolation stage, the transition between the two half cycles has a period of time when the two body diodes are conducting.
This condition is highly dissipative and should be kept short by keeping the overlap period that both primary side transistors, Q 1 and Q 2 , are off short. In all of the power converter circuits described above, it might be desirable to slow down the switch transitions in the isolation stage for many reasons. For instance, slower transitions might reduce the high frequency differential-mode and common-mode ripple components in the output voltage waveform.
There are several ways the switch transitions might be slowed down. For instance, in a well known manner a resistor could be placed in series with the gate of the primary side transistor Q 1 or Q 2 in FIG. Similarly, a resistor could be placed in series with the gate of a synchronous rectifier Q 3 or Q 4. In either case an RC circuit is created by the added resistor, R, and the capacitance, C, associated with the transistor.
If this RC product is long compared to the normal length of the oscillatory transitions described above, the switch transitions will be slowed down. As such, there is a tradeoff between the power converter's efficiency and its other attributes, such as output ripple content.
This tradeoff might result in slower switch transitions in situations where high efficiency is not required or if better synchronous rectifiers in the future have much smaller capacitances. If the output voltage is such that the gate drive voltage is too large for the ratings of the MOSFET, however, steps must be taken to reduce the drive voltage.
For example, if the output voltage is 15 volts, a 30 volt gate drive will result, and it is typically desired that the gate be driven to only 10 volts. The voltage waveform at node B or at node A is capacitively divided down by the series combination of capacitors C 5 and C 3 or by C 6 and C 4. The values of these capacitors are chosen to provide the division of the AC voltage provided at node B or node A as desired. For example, if node B has a 30 volt step change and a 10 volt step change is desired at the gate of Q 3 , then C 5 should have one half the capacitance of C 3.
Since C 3 may be comprised of the parasitic capacitance of Q 3 , it is likely to be nonlinear. In this case, an effective value of capacitance that relates the large scale change in charge to the large scale change in voltage should be used in the calculation to determine C 5. Since a capacitor divider only divides the AC components of a waveform, additional components need to be added to determine the DC component of the voltage applied to the gates of Q 3 and Q 4.
These resistors should have values large enough to keep their dissipation reasonably small. Other techniques employing diodes or zener diodes that are known in the art could be used instead of the resistor technique shown in FIG. One variation of the invention described herein would be to create a power supply with multiple outputs by having more than one secondary winding on each transformer in the isolation stage. For example, by using two secondary windings with the same number of turns it would be possible to create a positive 12 volt output and a negative 12 volt output.
If the two secondary windings have a different number of turns it would be possible to create two output voltages of different magnitudes e. Another approach for creating multiple outputs would be to have multiple isolation stages, each with a turns-ratio appropriate for their respective output voltages.
When multiple outputs are provided in this manner, a phenomenon commonly called cross-regulation occurs. A single regulation stage cannot control the various output voltages independently, and these output voltages depend not just on the relative turns ratios, but also on the voltage drops that result as the various output currents flow through the impedances of their various output paths. A change in any one or more output currents therefore causes a change in the voltages of those outputs that are not used for feedback to the regulation stage, so the outputs can be said to be semi-regulated.
If this variation due to changes in output currents is a problem, then various approaches for providing regulation of the uncontrolled outputs can be provided. For example, a linear regulator might be added to each output that is not otherwise regulated. One advantageous approach to providing linear regulation with the power circuits described here is to control how much the synchronous rectifier MOSFETs are turned on during their conduction state.
This can be done by adding circuitry to limit the peak voltage to which their gates will be driven so that their on-state resistances can be made larger than their minimum values. With both techniques, the amount to which the output voltage can be regulated is the difference between the voltage drop of the synchronous rectifiers when their channels are fully on i.
One way to accomplish the first technique, that of controlling the peak gate voltage, is to use the basic capacitor divider circuit that was shown in FIG. All that is needed is to make the resistor divider ratio, or, alternatively, the diode clamping voltage if such an approach is chosen dependent on a control signal derived from the error in the output voltage compared to its desired value.
The goal is to shift the DC component of the gate voltage in response to the error signal such that the peak voltage applied to the gate, and therefore the on-state resistance and voltage of the synchronous rectifier, helps to minimize this error.
Various control circuitry schemes that might be used to achieve this goal will be obvious to one skilled in the art. Note that this approach preserves the energy recovery feature of the gate drive. Note also that if the voltages at nodes A and B are such that no AC division is desired, then C 5 and C 6 should be made large compared to C 3 and C 4. The output voltage or a scaled version of it is subtracted from a reference voltage and the error is multiplied by the gain of an op-amp circuit.
The output of the op-amp node C is then connected to the synchronous rectifier gates through resistors that are large enough to not significantly alter the AC waveforms at the gates. With this connection, the DC components of the gate voltages will equal the output voltage of the op-amp at node C. If the gain of the op-amp circuit is large enough, such as when an integrator is used, the error in the output voltage will be driven toward zero. Z F and Z I are impedances that should be chosen, with well established techniques, to ensure stability of this feedback loop while providing the gain desired.
The range of voltage required at the output of the op-amp depends on the particular application, and it may include negative values. This range influences the supply voltage requirements for the op-amp. Also, if the op-amp's output voltage gets too high, the synchronous rectifiers may not turn off when they are supposed to. Some means of limiting this voltage, such as a clamp circuit, may therefore be desirable. One way to accomplish the second technique, that of controlling the portion of the half cycle in which the MOSFET is gated on, is to place a low power switch network between the gate of Q 3 or Q 4 , node B or node A , and ground.
This network composed, say, of analog switches operated with digital control signals might be used to keep the gate voltage grounded for some period of time after the node voltage increases, and to then connect the gate to node B or A for the remainder of the half cycle with a switch capable of bidirectional current flow. The length of the delay would be based on a signal derived from the error in the output voltage. With this approach, the energy recovery feature associated with discharging each synchronous rectifier's gate capacitance is preserved, but the charging transition will become lossy.
Alternatively, the switch network could be controlled to start out the half cycle with the gate connected to node B or A , and then after some delay to connect the gate to ground.
Using a synchronous rectifier to provide regulation as well as rectification, as described above, is not limited to multiple-output situations. It can also be used in single-output situations either as the total regulation stage or as an additional regulation stage to augment the first one.
It is also possible to use DC-DC switching regulators on the secondary side to achieve the additional regulation desired, or to create more than one output voltage from any of the outputs of the isolation stage.
With multiple outputs it is not necessary for the gate of each controlled rectifier to be connected to secondary winding of the other transformer which corresponds to the same output. For instance, if the two outputs are 5 volts and 3. Doing so would give these controlled rectifiers a 10 volt gate drive, resulting in a lower on-state resistance than if they had a 6.
In some situations, it may be desirable to place the isolation stage first in the power flow, and to have the regulation stage follow.
No matter where the isolation stage is situated, if it is to be current fed this requirement could be met with active circuitry as well as by a passive component such as an inductor. For instance, if the current fed isolation stage follows a regulation stage that is achieved with a linear regulator, then this linear regulator could be designed to have a large AC output impedance to achieve the input requirement of the current fed isolation stage.
When the regulation stage precedes the isolation stage, it is not necessary to sense the isolated output voltage to control the regulation.
An alternative approach is to sense the voltage on the primary side of the isolation stage, which may eliminate the need for secondary side circuitry and the need to bridge the feedback control signal across the isolation barrier.
For example, in FIG. This voltage nearly represents the isolated output voltage corrected for the turns-ratio. It differs only due to the resistive and parasitic inductance commutation drops between C B and the output.
Since these drops are small and proportional to the current flowing through the isolation stage, the output can be said to be semi-regulated and the error in output voltage they create can either be tolerated or corrected. To correct the error, the current on the primary side could be sensed, multiplied by an appropriate gain, and the result used to modify the reference voltage to which the voltage across C B is compared.
Since these resistive drops vary with temperature, it might also be desirable to include temperature compensation in the control circuitry. Note that this approach could also be used to correct for resistive drops along the leads connecting the supply's output to its load. The embodiments of the invention described above have used two uncoupled transformers for the isolation stage.
It is also possible, as shown in FIG. While the two primary windings may be tightly coupled, either the two secondaries should be loosely coupled to each other or the connections to the output capacitors and synchronous rectifier transistors should provide adequate parasitic inductance.
The resulting leakage and parasitic inductance on the secondary side can then be modeled as is shown in FIG. With this inductance present in the secondary side loops, the operation of the coupled isolation stage during the overlap period is similar to what was described above for the uncoupled case.
The voltage across the transformer windings, as modeled in FIG. What is different here is that the overlap period during which both Q 1 and Q 2 are on cannot last too long. If the overlap lasts too long, the transient waveforms will settle into a state where the voltages at nodes A and B rise to the output voltage. If this voltage is higher than the gates' threshold levels, transistors Q 3 and Q 4 will partially turn on. A large amount of energy will then be dissipated while this state persists, and it is possible for the output capacitor to be significantly discharged.
These problems can be avoided by making sure the overlap period when both Q 1 and Q 2 are on does not last too long. For a given converter, an overlap period can be found which will give the highest converter efficiency.
Based on the overlap time provided by a given control circuit, it may become necessary to add additional inductance by increasing the leakage or parasitic inductance. With a coupled transformer it is not necessary to provide a separate reset circuit whether it uses a tertiary winding or not since the magnetizing current always has a path through which it can flow.
With a coupled transformer it is necessary to keep the lengths of the two halves of the cycle well balanced to avoid imposing an average voltage across the core and driving it into saturation. Several techniques for balancing the two half cycles are well known in the art.
When two or more power supplies are connected in parallel, diodes are sometimes placed in series with each supply's output to avoid a situation where one supply's failure, seen as a short at its output, takes down the entire output bus. A resistor R F ensures the gate voltage discharges when the drive is removed. If the power supply fails in a way that creates a short at its output, such as when a synchronous rectifier shorts, the voltages at nodes A and B will also be shorted after the transient is complete.
When two or more power supplies of the type described here are placed in parallel, a problem can arise. If one power supply is turned on while another is left off i. Once this voltage rises above the threshold value, these synchronous rectifiers will turn on and draw current. At the least this will result in extra dissipation, but it could result in a shorted output bus.
There are several approaches to solving this problem. One is to make sure both supplies have matched transitions. Another is to connect the supplies together with ORing diodes so that no supply can draw current from the combined output bus. Assume the bus voltage is already high due to another supply, and the first supply is then turned on in a way that causes its output voltage to rise slowly toward its desired value.
If the ORing MOSFET's gate voltage rises high enough to turn it on before the newly rising output voltage approximately matches the existing bus voltage, then there will be at least a momentary large current flow as the two voltages equalize.
To avoid this problem additional circuitry can be added to make sure an ORing MOSFET is not turned on until its supply's output voltage has approximately reached the bus voltage. This might be done by sensing the two voltages and taking appropriate action, or it might be done by providing a delay between when the ORing MOSFET's gate drive is made available and when it is actually applied to the gate.
Such a delay should only affect the turn-on, however; the turn-off of the ORing MOSFET should have minimal delay so that the protective function of the transistor can be provided.
While this invention has been particularly shown and described with references to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Those skilled in the art will recognize or be able to ascertain using no more than routine experimentation, many equivalents to the specific embodiments of the invention described specifically herein. Such equivalents are intended to be encompassed in the scope of the claims. For instance, the regulation stage could be composed of an up-converter.
The ideas that have been presented in terms of the N-channel implementation of the synchronous rectifier MOSFET can be modified to apply to the P-channel implementation, as well. The components shown in the schematics of the figures such as Q 3 in FIG. USP true USB2 en. Loosely regulated feedback control for high efficiency isolated DC-DC converters. USB1 en. CNA en. CNB en. EPB1 en. Voltage feed-forward compensation and voltage feedback compensation for switched mode power supplies.
WOA1 en. Systems and methods for generating electrosurgical energy using a multistage power converter. Systems and methods for measuring tissue impedance through an electrosurgical cable. Control circuits and methods for regulating output voltages based on adjustable references voltages. Controlled resonant converter and its synchronous rectification translation circuit. Ignition system with series connected transistor and common core inductors to speed switching. Preventing turn-off overshoot in regulated power supplies employing feedback regulation.
Circuit using capacitor and switch on primary winding of transformer for regulating voltage on secondary winding of transformer. A method as claimed in claim 13 wherein the regulating is through a switching regulator including a controlled rectifier.
USP true USB2 en. Control circuits and methods for regulating output voltages based on adjustable references voltages. USB1 en. Loosely regulated feedback control for high efficiency isolated DC-DC converters. CNA en. CNB en.
EPB1 en. Voltage feed-forward compensation and voltage feedback compensation for switched mode power supplies.
WOA1 en. Systems and methods for generating electrosurgical energy using a multistage power converter. Systems and methods for measuring tissue impedance through an electrosurgical cable. Controlled resonant converter and its synchronous rectification translation circuit.
USA en. Self-oscillatory direct-current to alternating-current inverters with magnetic amplifer controls. Ignition system with series connected transistor and common core inductors to speed switching. Tracer servo control apparatus for a machine tool with slow down means for the feed axis. Preventing turn-off overshoot in regulated power supplies employing feedback regulation.
Elimination of short circuit current of power transistors in push-pull inverter circuits. Circuit using capacitor and switch on primary winding of transformer for regulating voltage on secondary winding of transformer. Driven inverter with low-impedance path to drain stored charge from switching transistors during the application of reverse bias. Collector follower-type transistorized voltage regulator with thermistor starting circuit.
System for detecting and utilizing the maximum available power from solar cells. High stability current regulator controlling high current source with lesser stability. Dc to dc converter with voltage regulation feedback loop achieving isolation between input and output by time domain techniques. Regulated dc to dc converter with regulated current source driving a nonregulated inverter. Regulated dc-to-dc converter for voltage step-up or step-down with input-output isolation.
Power supply including inverter having multiple-winding transformer and control transistor for controlling main switching transistors and providing overcurrent protection. Rectifier circuits using at least one multi-winding transformer in combination with transistors connected in an inverter mode and arranged in a bridge configuration.
DC to DC converter with regulation having accelerated soft start into active control region of regulation and fast response overcurrent limiting features. AC solid state power controller with minimized internal power supply requirements. Converter utilizing leakage inductance to control energy flow and improve signal waveforms.
Inverter converter circuit for maintaining oscillations throughout extreme load variations. Inverter circuit control circuit for precluding simultaneous conduction of thyristors.
Means for controlling the electric current density of a high tension direct current source. DEA1 en. Power supply system with two regulated power supply devices connected in parallel at an output. Method for the transmission of DC current between at least one rectifier station and several inverter stations.
Phase control arrangement to limit output signal transients during power source substitution in an uninterruptible power supply. DC-to-DC switching converter with zero input and output current ripple and integrated magnetics circuits. High frequency switching circuit having preselected parameters to reduce power dissipation therein. Circuit arrangement for controlling the energization of a load from a plurality of current sources.
Temperature-correction network for extrapolated band-gap voltage reference circuit. Remote AC power control with control pulses at the zero crossing of the AC wave. Separately excited DC-DC converter having feedback circuit with temperature compensating effect. High efficiency turn-off loss reduction network with active discharge of storage capacitor. Switching regulator power supply device combined with the horizontal deflection circuit of a television receiver which it supplies.
GBA en. Circuit arrangement for securing the supply voltage supply of an electronic load. Temperature compensating method and apparatus for thermally stabilizing amplifier devices. Voltage regulator circuit with supply voltage ripple rejection to transient spikes.
Multi-output-type power supply devices using separately-exciting-type switching regulators. Controlled ferroresonant voltage regulator providing immunity from sustained oscillations. FRB1 en. Process and device for eliminating the disturbances related to the fluctuations of the load in chopped power supplies.
Single transistor forward converter with lossless magnetic core reset and snubber network. Power supply for an electrostatic air cleaner with a modulated pulse width voltage input having a backup pulse width limiting means. Picture display device comprising a power supply circuit and a line deflection circuit. Topology for miniature power supply with low voltage and low ripple requirements. American Telephone And Telegraph Co.
Current mode control arrangement with load dependent ramp signal added to sensed current waveform. High switching frequency converter auxiliary magnetic winding and snubber circuit.
Single ended forward converter with resonant commutation of magnetizing current. EPA3 en. Inverter system for inputting alternating current and direct current in combination. Parallel connected power supplies having parallel connected control circuits which equalize output currents to a load even after one supply is turned off.
Constant voltage supply system including a constant current source driven switching regulator. High frequency power converter having compact output transformer, rectifier and choke.
Switched power supply for generating a plurality of isolated power voltage for a pulse converter. High power flyback, variable output voltage, variable input voltage, decoupled power supply. Static power conversion method and apparatus having essentially zero switching losses and clamped voltage levels. Stabilized electric power apparatus for generating direct and alternating current simultaneously in one transformer.
Power supply having combined forward converter and flyback action for high efficiency conversion from low to high voltage. Start circuit for adapting a constant current generator to a wide variety of loads. High frequency heating system with changing function for rated consumption power. Full bridge power converter with multiple zero voltage resonant transition switching. Electric supply apparatus having means for correcting supply voltage fluctuations. EPA1 en. Modular expandable digital single-stage switching network in ATM Asynchronous Transfer Mode technology for a fast packet-switched transmission of information.
Current sharing control with limited output voltage range for paralleled power converters. EPA2 en. Shunt circuit for reducing audible noise at low loading conditions of a power supply employing a high frequency resonant converter. Improving series voltage regulator efficiency by feedback to a switching pre-regulator.
Circuit for regulating a parameter by means of a bidirectional current structure. Regulation of d. CRT power supply apparatus having synchronized high and low voltage power supply switching circuits.
Transformer with a strong coupling for chopped supply circuit and supply circuit comprising such a transformer. Zero current switching forward power conversion apparatus and method with controllable energy transfer. Apparatus for parallel operation of triport uninterruptable power source devices. Regulated bi-directional DC-to-DC voltage converter which maintains a continuous input current during step-up conversion. Cascaded rectifier and two switched voltage converter circuits with harmonics suppression.
X-ray power supply utilizing A. Zero-voltage switching power converter with lossless synchronous rectifier gate drive. Low loss synchronous rectifier for application to clamped-mode power converters. Efficient transistor drive circuit for electrical power converter circuits and the like. Drive circuit for zero-voltage switching power converter with controlled power switch turn-on. Isolated multiple output Cuk converter with primary input voltage regulation feedback loop decoupled from secondary load regulation loops.
Dual slope soft start for pulse width modulator controllers used in power converters. Efficient, high power density, high power factor converter for very low dc voltage applications. Power distribution system for generating regulated DC output voltages using a dual active bridge converter driven from an unregulated DC source.
Switching converter with open-loop input voltage regulation on primary side and closed-loop load regulation on secondary side. Self-synchronized drive circuit for a synchronous rectifier in a clamped-mode power converter.
High-frequency switching circuits operable in a natural zero-voltage switching mode. Circuit and method for achieving zero ripple current in the output of a converter. Circuit for monitoring and disabling power supply signals to a microprocessor in a computer system utilizing secondary voltage regulators. Synchronous rectifying circuit of an active clamping type with less driving loss and less continuity loss.
Synchronous rectifier type DC-to-DC converter in which a saturable inductive device is connected in series with a secondary-side switching device. High-frequency, high-efficiency converter with recirculating energy control for high-density power conversion. Multi-output switching regulator having controlled timing of boost convertor, inverter and flyback type outputs.
Single ended forward DC-to-DC converter providing enhanced resetting for synchronous rectification. Method and apparatus for isolated flyback regulator control and load compensation.
Protected zero-crossing detection using switching transistor's on-resistance. Single ended forward converter with synchronous rectification and delay circuit in phase-locked loop.
Soft switching power converter comprising means for correcting the median voltage of a capacitive voltage divider. Stabilized power supply circuit including hyperresonant chopping and synchronous rectification. Switched-mode power supply having a delay-insensitive timing in the control loop. Ripple cancellation circuit with fast load response for switch mode voltage regulators with synchronous rectification. Power supply having a synchronous rectifier circuit for improved switching timing.
Switched-mode power supply having a sample-and-hold circuit with improved sampling control. Synchronous rectifier having dynamically adjustable current rating and method of operation thereof.
PLB3 en. Self-synchronized gate drive for power converter employing self-driven synchronous rectifier and method of operation thereof.
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